Shares of Keysight Technologies Inc climbed roughly 3% on Tuesday after the company unveiled a collaborative GaN MMIC design workflow developed with WIN Semiconductors Corp. The joint solution is intended to bring on-chip multi-domain simulation, 3D layout with verification and off-chip MMIC evaluation board design into a single design environment.
The workflow is built to streamline the steps designers typically perform before sending an MMIC design to the foundry. By automating simulation, optimization and verification tasks required for sign-off, the companies said the workflow aims to increase the probability of achieving a first-pass tapeout.
According to the partners, a failed tapeout can impose weeks of delay while a design is respun at a different foundry, underscoring the time costs associated with fabrication setbacks. The new environment allows engineers to design and optimize on-chip and off-chip components together and to validate performance against specifications using test equipment.
The solution is positioned for developers of GaN MMICs across several RF markets. Examples cited by the companies include 5G base station infrastructure, Wi-Fi access point equipment, satellite payload subsystems, and defense radar systems.
WIN Semiconductors’ NP 120P GaN Process Design Kit gives MMIC designers access to process models and layout rules. Those models are integrated within Keysight’s Advanced Design System (ADS) and RF Circuit Simulation Professional products to automate portions of the workflow that support first-pass MMIC tapeout objectives.
"We are delighted to collaborate with Keysight to deliver a customized LVS solution within the WIN ADS PDK," said Richard Kuo, Director of Design Service at WIN Semiconductors. "By combining Keysight’s ADS expertise with WIN’s robust PDK and advanced process technology, we provided a comprehensive verification solution that streamlined the customer’s design flow and accelerated the time-to-market for advanced RF products with greater confidence and reliability."
The companies highlighted the commercial backdrop for GaN RF devices, noting a projected global market size of $2.77 billion by 2031. In practical terms, the workflow is intended to reduce iteration between design and fab, align simulated performance with measured outcomes, and shorten development timelines for advanced RF modules.
Sectors impacted: semiconductor design and fabrication, telecommunications equipment, aerospace and defense electronics.