Intel is positioning its Embedded Multi-die Interconnect Bridge-T, or EMIB-T, as an alternative to Taiwan Semiconductor Manufacturing Co.'s CoWoS platform - the prevailing high-performance packaging solution used for artificial intelligence accelerators. As AI processors grow in size and complexity, demand is straining existing CoWoS capacity and opening consideration of alternative approaches.
Analysts at Bernstein said EMIB-T could close part of the gap versus CoWoS, particularly for clients that need very large package sizes and prefer U.S.-based manufacturing. After years of applying EMIB internally, Intel has begun offering EMIB-T to external customers, and Bernstein reported that Google-MediaTek is evaluating the technology for a 2027 tensor processing unit while Meta is assessing it for MTIA accelerators.
EMIB-T extends Intel's earlier EMIB approach by embedding silicon bridges and through-silicon vias directly into the substrate. Bernstein said this construction enables larger reticle scaling than current CoWoS offerings.
Benchmarks cited by Bernstein show differences in reticle support: CoWoS-S handles roughly 3.3x reticle size, with CoWoS-L forecast to reach about 5.5x and then 9.5x in 2027. Intel reported EMIB supported 6x reticle size in 2024, is targeting 8x by 2026 and is aiming for as much as 12x by 2028.
Bernstein attributed much of this divergence to production geometry. CoWoS uses circular wafers as carriers; as package dimensions grow, unused wafer-edge area increases. EMIB-T employs rectangular substrates, which reduce wasted space on large packages and lower aggregate material usage.
On cost, Bernstein estimated EMIB packaging expenses at "a few hundred $" per chip, compared with about $900 to $1,000 for CoWoS on a Rubin-equivalent AI processor. That delta, if realized at scale, could alter component economics for large AI accelerators.
Still, the brokerage highlighted meaningful risks. EMIB-T lacks a proven external production track record, and embedding silicon bridges inside organic substrates can create yield challenges tied to material mismatch and mechanical stress. Failed packages can destroy costly logic dies and stacks of high-bandwidth memory, so consistently high yields are necessary for EMIB-T to remain cost competitive with CoWoS.
Intel's packaging footprint also factors into the calculus. The company operates advanced packaging plants in New Mexico and Malaysia, has established processes with Amkor at the Songdo facility in South Korea, and plans additional capacity in Arizona. Bernstein said this existing U.S. packaging presence offers Intel an advantage for customers seeking near-term U.S.-based packaging, noting that TSMC's U.S. packaging timeline has not been publicly defined.
Bernstein provided a sense of potential financial impact. If 1 million AI processors shifted from CoWoS to EMIB-T, TSMC's revenue could be affected by about $1 billion - roughly 0.5% of its projected 2027 revenue. Intel, by contrast, could realize high-hundreds-of-millions of dollars in incremental revenue, equal to about 1% to 2% of total sales.
On a recent earnings call, Intel management said that advanced packaging opportunities could range from "hundreds of millions of dollars" to "north of a billion dollars" per customer, according to Bernstein's reporting.
Bernstein also identified substrate suppliers as potential beneficiaries. As EMIB-T shifts greater complexity and value into substrates, the brokerage estimated EMIB-T substrate content could reach about $300 per chip, compared with $180 to $200 for Rubin and $80 to $100 for earlier designs. Such an increase in substrate value could translate into meaningful revenue and operating-profit upside for suppliers like Ibiden if adoption expands.
Impacted sectors and market implications
- Semiconductor manufacturing and advanced packaging - potential changes in demand mix between CoWoS and EMIB-T.
- Substrate suppliers and assembly partners - possible increase in substrate content and revenue.
- Hyperscale cloud and AI hardware customers - choices driven by package scale, cost and U.S.-based capacity.
Outlook
EMIB-T presents a technically distinct route to assemble large AI packages by leveraging rectangular substrates and embedded silicon bridges. The approach promises larger reticle scaling and lower material waste, and Bernstein's estimates suggest materially lower per-chip packaging costs versus CoWoS on comparable processors. However, the technology's commercial success hinges on proving consistent yields at scale and demonstrating reliable external production - areas where EMIB-T has yet to accumulate a track record.