Syenta, a semiconductor technology startup based in Australia, said it has raised $26 million to advance a manufacturing technique it argues could relieve a persistent advanced packaging bottleneck for artificial intelligence chips.
The company disclosed on Tuesday that the financing will support further development of a novel copper-interconnect fabrication process and the opening of a U.S. office in Arizona, located near major chip manufacturing facilities operated by Intel and Taiwan Semiconductor Manufacturing Co (TSMC). Syenta also said Pat Gelsinger, the former CEO of Intel, will join its board of directors. Gelsinger is currently a venture capitalist at Playground Global, which led the financing round.
Modern AI accelerators from companies such as Nvidia and Google are typically assembled from multiple die that are joined together using advanced packaging. Much of that packaging capacity today comes from TSMC, and packaging has emerged as a point of congestion for large chip designers.
Most advanced packaging approaches place several chips onto a base layer that serves to connect them electrically. According to Syenta, that base layer is usually produced in a manner similar to a very large semiconductor die, a method the company says is both costly and time-consuming.
Syenta’s chief executive and co-founder, Jekaterina Viktorova, described the startup’s alternative as an electrochemical transfer process that operates like a stamp, depositing the copper wiring required on the base layer. Viktorova said the method reduces the number of process steps by about 40% and does so without requiring unusual manufacturing tools. She emphasized the speed difference: "This process takes minutes, as opposed to several hours, so it’s a massive difference in how you build your copper interconnects," she said in an interview.
Pat Gelsinger, speaking in his capacity at Playground Global and as a newly appointed Syenta board member, said the technology could expand and standardize the supply chain for advanced packaging while preserving the density and performance benefits that motivate complex multi-die designs. "You open up a much bigger, more standardized, more available supply chain, yet with the density and performance" gains he said.
Syenta said it is already collaborating with several chip designers as it seeks to scale the process. The company has set a goal of achieving high-volume production by 2028.
The funding round was led by Playground Global and included participation from Australia’s government-owned National Reconstruction Fund, along with existing investors Investible, Salus Ventures, Jelix Ventures and Wollemi Capital.
Context and implications
- Advanced packaging is a crucial step for modern AI chips and has become a capacity constraint for major designers.
- Syenta’s process claims to reduce steps and cycle time for building copper interconnect base layers without atypical equipment, potentially increasing daily throughput of base layers.
- The company is establishing a presence in Arizona to be near major fabs and has set a timeline to reach high-volume production by 2028.